Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Particular read circuit

Reexamination Certificate

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Details

C365S230060, C365S191000, C365S189160

Reexamination Certificate

active

07573757

ABSTRACT:
Disclosed herein is a semiconductor memory device for reducing a current consumption used for operating a write command or a read command. The semiconductor memory device includes a global data latch unit for latching a global data loaded on a global data line in response to a first write enable signal to thereby generate a global latch data; a local data write driving unit for receiving the global latch data to output a local data to a local data line in response to a second write enable signal; and a write driver control unit for generating the first write enable signal and the second write enable signal to inactivate the first write enable signal when a write operation is not performed.

REFERENCES:
patent: 5867446 (1999-02-01), Konishi et al.
patent: 6208582 (2001-03-01), Kanda et al.
patent: 7136312 (2006-11-01), Fujimoto et al.
patent: 7161860 (2007-01-01), Ha et al.
patent: 2003/0048680 (2003-03-01), Ooishi et al.
patent: 2000-078858 (2000-03-01), None
patent: 2000-260197 (2000-09-01), None
patent: 2001-126470 (2001-05-01), None

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