Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1995-03-09
1997-04-01
Nguyen, Tan T.
Static information storage and retrieval
Read/write circuit
Bad bit
36518509, G11C 2900
Patent
active
056173644
ABSTRACT:
A semiconductor memory device includes a memory cell array having memory cells connected to word lines and bit lines, a redundant memory cell array having either a row redundancy array which is commonly provided to the memory cells and has redundant word lines for saving faulty word lines, or a column redundancy array which is commonly provided to the memory cells and has redundant bit lines for saving faulty bit lines, and a redundancy saving circuit including either one or more row redundancy array saving bit lines for saving one or more bit-line faults occurring in the row redundancy array or one or more column redundancy array saving word lines for saving one or more word-line faults occurring in the column redundancy array.
REFERENCES:
patent: 4639897 (1987-01-01), Wacyk
patent: 5278839 (1994-01-01), Matsumoto et al.
patent: 5307316 (1994-04-01), Takemae
Fujitsu Limited
Nguyen Tan T.
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