Semiconductor memory device

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S230050

Reexamination Certificate

active

07468901

ABSTRACT:
In a two-transistor gain cell structure, a semiconductor memory device capable of stable reading without malfunction and having small-area memory cells is provided. In a two-transistor gain cell memory having a write transistor and a read transistor, a write word line, a read word line, a write bit line, and a read bit line are separately provided, and voltages to be applied are independently set. Furthermore, a memory cell is connected to the same read word line and write bit line as those of an adjacent memory cell.

REFERENCES:
patent: 5220530 (1993-06-01), Itoh
patent: 5757693 (1998-05-01), Houghton et al.
patent: 5835403 (1998-11-01), Forbes
patent: 6362502 (2002-03-01), Rosner et al.
patent: 6677633 (2004-01-01), Sakata et al.
patent: 2002/0075723 (2002-06-01), Hofmann et al.
patent: 2006/0054977 (2006-03-01), Somasekhar et al.
patent: 2001-53167 (2001-02-01), None

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