Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Complementing/balancing

Reexamination Certificate

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Details

C365S190000, C365S207000

Reexamination Certificate

active

07436720

ABSTRACT:
A semiconductor memory device includes plates accessed by different row addresses and a sense amplifier column between the adjacent plates. The sense amplifier column is a mixture of configurations, one in which one of the pair of bit lines is twisted, and another in which neither of the pair of bit lines is twisted. If an address analysis indicates that there is an access through an input/output wiring, input/output data is not inverted. If the address analysis indicates that there is an access through another input/output wiring and that it is an access to a plate, the input/output data is not inverted, while if it is an access to another plate, the input/output data is inverted.

REFERENCES:
patent: 5136543 (1992-08-01), Matsuda et al.
patent: 2003/0193824 (2003-10-01), Tsukikawa et al.
patent: 63-148489 (1988-06-01), None
patent: 7-58587 (1995-06-01), None
patent: 9-147597 (1997-06-01), None
patent: 2002-319299 (2002-10-01), None
patent: 2002-343094 (2002-11-01), None

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