Semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S365000, C257S500000

Reexamination Certificate

active

07375399

ABSTRACT:
The present invention is a semiconductor memory device having a logic block and a memory block on the same chip. In the memory device, unit memory cells each include at least two transistors, one of which is a write transistor for storing an electric charge into and releasing it from an electric charge storage node, and the other is a read transistor whose conductance in a channel region provided between a source and drain of the read transistor is modulated dependently on the amount of electric charge stored into or released from the electric charge storage node by the write transistor. The read transistor has a gate-insulating film thicker than that of a transistor provided in the logic block, and uses the same diffusion layer structure as that of the logic block.

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M. Yamaoka et al., “A 300MHz 25μA/Mb Leakage On-Chip SRAM Module Featuring Process-Variation Immunity and Low-Leakage-Active Mode for Mobile-Phone Application Processor”,IEEE International Solid-State Circuit Conference, 2004, pp. 494, 495, 592.
H. Shichijo et al., “TITE RAM: A New SOI DRAM Gain Cell for Mbit DRAM's”,Conference on Solid-State Devices and Materials, 1984, pp. 265-268.
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T. Osabe et al., “A Single-Electron Shut-Off Transistor for a Scalable Sub-0.1-μ Memory”,IEEE International Electron Devices Meeting, 2000, pp. 301-304.

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