Static information storage and retrieval – Read/write circuit – Erase
Patent
1981-11-13
1984-03-13
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Erase
365182, G11C 1140
Patent
active
044371748
ABSTRACT:
A semiconductor memory device consisting of memory cells each of which has an erase gate for erasing data from the floating gate thereof.
The semiconductor memory device has a circuit for applying an erase voltage of high level to the erase gate to erase data from the floating gate. The semiconductor memory device further includes a circuit for applying a predetermined potential difference between the drain and the source of a selected memory cell so as to detect a current flowing through the selected memory cell, thereby detecting the data erasure condition from the floating gate of the selected memory cell. A circuit is also included for inhibiting the application of the erase voltage upon detection of the current flowing through the memory cell.
REFERENCES:
patent: 4203158 (1980-05-01), Frohman-Bentchkowsky et al.
1980 IEEE International Solid-State Circuit Conference 152, (Feb. 1980), A 16Kb Electrically Erasable Nonvolatile Memory.
Kupec et al., Triple Level Poly-Silicon E.sup.2 Prom with Single Transistor per Bit 1980 IEEE.
Fears Terrell W.
Tokyo Shibaura Denki Kabushiki Kaisha
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