Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-10-23

2007-10-23

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S189090

Reexamination Certificate

active

11488053

ABSTRACT:
A semiconductor memory device including: a memory cell array with electrically rewritable and non-volatile memory cells arranged therein; a sense amplifier circuit configured to read data of the memory cell array; first data hold circuits configured to hold data for designating whether each column of the memory cell array is defective or not; and a second data hold circuit configured to hold data read out of the first data hold circuits, and to control skipping a defective column address of the memory cell array in accordance with the data read out of the first data hold circuit.

REFERENCES:
patent: 5347484 (1994-09-01), Kwong et al.
patent: 6337815 (2002-01-01), Cho
patent: 6459630 (2002-10-01), Nakayama et al.
patent: 6552937 (2003-04-01), Ladner et al.
patent: 6788597 (2004-09-01), Ladner et al.
patent: 6813184 (2004-11-01), Lee
patent: 6816420 (2004-11-01), Liu et al.
patent: 2006/0044918 (2006-03-01), Kang et al.

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