Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-11-20

2007-11-20

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S149000

Reexamination Certificate

active

11460299

ABSTRACT:
Pseudo SRAM capable of arbitrating refresh requests with external access requests is provided. An access waiting circuit20for generating an access waiting signal /ECP in response to an external access request signal /CE or the like, an access activating circuit21for generating an access activating signal /AE in response to L level of the access waiting signal /ECP and H level of a busy signal /BUSY, a refresh waiting circuit22for generating a refresh waiting signal /REFP in response to a refresh request signal /REFT, and a refresh activating circuit23for generating a refresh activating signal /REFE in response to H level of the access waiting signal /ECP, L level of the refresh waiting signal /REFP, and H level of the busy signal /BUSY are provided. An array control circuit12performs an access operation in response to the access activating signal /AE, and performs the refresh operation in response to the refresh activating signal /REFE.

REFERENCES:
patent: 5619470 (1997-04-01), Fukumoto
patent: 6449685 (2002-09-01), Leung
patent: 2006/0039220 (2006-02-01), Takahashi et al.
patent: 2003-187575 (2003-07-01), None
patent: 2004-319053 (2004-11-01), None

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