Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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C365S207000, C365S189040

Reexamination Certificate

active

11056243

ABSTRACT:
The disclosure concerns a semiconductor memory device that includes memory cells that store data by accumulating or discharging an electric charge; memory cell arrays having a plurality of the memory cells disposed in a matrix; a plurality of word lines connected to the memory cells arrayed in rows of the memory cell arrays; a plurality of bit lines connected to the memory cells arrayed in columns of the memory cell arrays; a plurality of dummy cells arrayed in a row direction of the memory cell arrays and are connected to the bit lines; sense amplifiers detecting data within the memory cells by using an average value of electric characteristics of the dummy cells that store mutually different digital data as a reference signal; and a plurality of switching elements electrically connecting four or more of the bit lines in order to generate the reference signal.

REFERENCES:
patent: 5969979 (1999-10-01), Hirano
patent: 6587367 (2003-07-01), Nishimura et al.
patent: 2005/0195680 (2005-09-01), Higashi et al.
patent: 2005/0226070 (2005-10-01), Ohsawa
patent: 2003-100080 (2003-04-01), None
patent: 2004-362720 (2004-12-01), None
patent: WO97/36300 (1997-10-01), None

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