Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S201000

Reexamination Certificate

active

11323359

ABSTRACT:
A semiconductor memory device is provided. The semiconductor memory device includes: an oscillation means for generating a self-refresh enable signal and a self-refresh period pulse having a predetermined period in response to a self-refresh signal; a shift register for generating a self-refresh period level signal maintaining a different level at every self-refresh period defined by the self-refresh enable signal and the self-refresh period pulse, in response to a test mode signal; a multiplexing means for selectively outputting a data signal and the self-refresh period level signal in response to the test mode signal; and an output buffer for buffering the output signal of the multiplexing means to output the buffered signal.

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patent: 10-2004-0006768 (2004-01-01), None

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