Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2007-01-23
2007-01-23
Ellis, Kevin L. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
Reexamination Certificate
active
10741630
ABSTRACT:
A control circuit for a row active time includes a row active signal generator for generating a row active signal in response to a row active control signal and an active command signal, wherein the row active signal has the row active time defined by the row active control; and a row active control signal generator for generating the row active control signal in response to the row active signal, wherein the row active control signal is delayed for a predetermined time at an auto refresh operation.
REFERENCES:
patent: 6292420 (2001-09-01), Kim et al.
patent: 6385692 (2002-05-01), Banks et al.
patent: 1998-040799 (1999-08-01), None
patent: 1020000008778 (2000-02-01), None
Blakely & Sokoloff, Taylor & Zafman
Ellis Kevin L.
Hynix / Semiconductor Inc.
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