Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Data refresh

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36518904, G11C 1134

Patent

active

06134169&

ABSTRACT:
In a semiconductor memory device of the present invention, a read operation is performed by activating a first word line of the plurality of word lines, transferring data read out from the memory cells simultaneously selected by the first word line via the plurality of bit line groups, latching the data from the plurality of bit line groups in the plurality of first sense amplifiers via the first switch section, transferring data from one of the plurality of first sense amplifiers to the first common data line via one of the plurality of third switch sections, and outputting the data from the first common data line to an external unit. A refresh operation is performed, simultaneously with the read operation, by activating a second word line of the plurality of word lines, and refreshing data read out from the memory cells simultaneously selected by the second word line using the plurality of second sense amplifiers via the second switch section.

REFERENCES:
patent: 4161040 (1979-07-01), Satoh
patent: 5511033 (1996-04-01), Jung

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