Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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C365S156000, C365S190000

Reexamination Certificate

active

06999367

ABSTRACT:
A semiconductor memory device includes word lines, bit line pairs, memory cells1, bit line precharge circuits2, and write amplifiers3, as well as a dummy word line, a dummy bit line pair, dummy memory cells1a, 1b, and1c, and a memory cell storing node detection circuit6. Through the action of the dummy memory cells1band1c, it is ensured that the write timing for the dummy memory cell1ais substantially identical to the write timing for the memory cells1. Based on changes in the states of storing nodes S1and S2included in the dummy memory cell1a, the memory cell storing node detection circuit6generates a write completion signal WRST. As a result, a semiconductor memory device having an optimized write timing and low power consumption is provided.

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patent: 11-096768 (1999-04-01), None
patent: 2002-367377 (2002-12-01), None

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