Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2006-02-07

2006-02-07

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S230030, C365S233100, C365S190000

Reexamination Certificate

active

06996020

ABSTRACT:
A plurality of dummy bit lines are disposed together with a plurality of bit line pairs in a memory cell array. In selectively driving a memory cell connected to the bit line pair, a timing control circuit controls the timing of the driving operation, based on signal change in the plural dummy bit lines, thereby detecting the influences of the process variation in a plurality of positions in the memory cell array. Thus, the influence of the process variation given to the operation of a semiconductor memory device can be further alleviated, compared with the case when one dummy bit line is used.

REFERENCES:
patent: 5268869 (1993-12-01), Ferris et al.
patent: 5408438 (1995-04-01), Tanaka et al.
patent: 5886939 (1999-03-01), Choi et al.
patent: 07093972 (1995-04-01), None
patent: 11339476 (1999-12-01), None

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3651955