Semiconductor memory device

Static information storage and retrieval – Addressing – Multiple port access

Reexamination Certificate

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Details

C365S230060, C365S154000, C365S156000

Reexamination Certificate

active

07054217

ABSTRACT:
A semiconductor memory device capable of improving the operating speed while suppressing size increase is provided. This semiconductor device comprises a plurality of word lines and a plurality of bit lines arranged to intersect with each other, a single-port SRAM cell, connected to the bit lines and the word lines, having a single port for inputting/outputting data, a first row decoder and a second row decoder connected to the word lines for selecting a row address and a first column decoder and a second column decoder connected to the bit lines for selecting a column address, while each word line is divided into a plurality of local word lines.

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patent: 05-109279 (1993-04-01), None
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patent: 09-017177 (1997-01-01), None

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