Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate
2006-09-19
2006-09-19
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Addressing
Multiple port access
C365S063000, C365S230060
Reexamination Certificate
active
07110318
ABSTRACT:
A semiconductor memory device having a multiport memory includes a plurality of memory cells MC arranged in columns and rows, a plurality of first word lines WLA0–WLAn connected to a first port13a, and a plurality of second word lines WLB0–WLBn connected to a second port13b. Each of a plurality of first word lines WLA0–WLAn and each of a plurality of second word lines WLB0–WLBn are arranged alternately in a planar layout. A semiconductor memory device is thus obtained that allows a coupling noise between interconnections to be reduced without an increase in memory cell area.
REFERENCES:
patent: 5586072 (1996-12-01), Longway et al.
patent: 5877976 (1999-03-01), Lattimore et al.
patent: 5966317 (1999-10-01), O'Connor
patent: 6590802 (2003-07-01), Nii
patent: 6606276 (2003-08-01), Yamauchi et al.
patent: 6710412 (2004-03-01), Tsukamoto et al.
patent: 6822300 (2004-11-01), Nii
patent: 6909662 (2005-06-01), Sugiyama
patent: P2000-12704 (2000-01-01), None
patent: P2000-236029 (2000-08-01), None
patent: P2002-43441 (2002-02-01), None
patent: P2002-237539 (2002-08-01), None
Auduong Gene N.
McDermott Will & Emery LLP
Renesas Technology Corp.
LandOfFree
Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3566114