Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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Details

C365S207000, C365S230060

Reexamination Certificate

active

06909644

ABSTRACT:
The present invention provides a semiconductor memory device of a twin-storage type having an operation control method and a circuit structure that achieve a higher process rate, a less power consumption, and a smaller chip area. This semiconductor memory device includes bit lines in pairs, a sense amplifier connected to each pair of the bit lines, a first memory cell connected to one bit line of each pair of the bit lines, a second memory cell that is connected to the other bit line of each pair of the bit lines and stores the inverted data of the data stored in the first memory cell. This semiconductor memory device is characterized by not having means to pre-charge the bit lines to a predetermined potential. The semiconductor memory device of the present invention is also characterized by including a control circuit that controls the sense amplifier to start a pull-down operation after starting a pull-up operation.

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