Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S230030, C365S230060

Reexamination Certificate

active

06856561

ABSTRACT:
A semiconductor memory device has a cell array, first normal elements each defined within the cell array as a group of memory cells arranged in a first direction of the cell array, second normal elements each defined within the cell array as a group of memory cells arranged in a second direction of the cell array, each the second normal element selecting a memory cells in operative association with a corresponding one of the first normal elements, first redundant elements disposed for replacement of defective first normal elements within the cell array, and second redundant elements disposed for replacement of defective second normal elements within the cell array. There are defined within the cell array first/second repair regions as a group of first/second normal elements with permission of replacement by each first/second redundant element.

REFERENCES:
patent: 5894441 (1999-04-01), Nakazawa
patent: 6052318 (2000-04-01), Kirihata et al.
patent: 6118712 (2000-09-01), Park et al.

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