Semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S022000, C257S024000, C257S025000, C365S149000, C365S175000

Reexamination Certificate

active

06853022

ABSTRACT:
A semiconductor memory device having as its main storage portion a capacitor storing charges as binary information and an access transistor controlling input/output of the charges to/from the capacitor, and eliminating the need for refresh, is obtained. The semiconductor memory device includes a capacitor with a storage node located above a semiconductor substrate and holding the charges corresponding to a logical level of stored binary information, an access transistor located on the semiconductor substrate surface and controlling input/output of the charges accumulated in the capacitor, and a latch circuit located on the semiconductor substrate and maintaining a potential of the capacitor storage node. At least one of circuit elements constituting the latch circuit is located above the access transistor.

REFERENCES:
patent: 5278459 (1994-01-01), Matsui et al.
patent: 5498563 (1996-03-01), Okamoto
patent: 5714778 (1998-02-01), Yamazaki
patent: 5844837 (1998-12-01), Yoshikawa
patent: 5953249 (1999-09-01), van der Wagt
patent: 6081443 (2000-06-01), Morishita et al.
patent: 195 42 240 (1996-05-01), None

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