Static information storage and retrieval – Systems using particular element – Flip-flop
Reexamination Certificate
2005-03-15
2005-03-15
Ho, Hoai (Department: 2818)
Static information storage and retrieval
Systems using particular element
Flip-flop
C365S230050, C365S042000, C365S042000, C257S200000, C257S321000, C257S369000
Reexamination Certificate
active
06868001
ABSTRACT:
With a P well region being divided, NMOS transistors N1and N3are formed in the first P well region, and NMOS transistors N2and N4in the second P well region. Alternatively, with a N well region being divided, PMOS transistor P1is formed in the first N well region, and PMOS transistor P2in the second N well region.
REFERENCES:
patent: 5049967 (1991-09-01), Watanabe et al.
patent: 6590802 (2003-07-01), Nii
patent: 20020181273 (2002-12-01), Nii et al.
patent: 10-178100 (1998-06-01), None
patent: 11-135647 (1999-05-01), None
patent: 2000-36543 (2000-02-01), None
patent: 2000-036543 (2000-02-01), None
patent: 2001-28401 (2001-01-01), None
Ho Hoai
Nguyen Dao H.
Renesas Technology Corp.
LandOfFree
Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3380683