Semiconductor memory circuitry

Details Semiconductor memory circuitry Semiconductor memory circuitry

2006-06-06

2006-06-06

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S296000, C257S304000

Reexamination Certificate

active

07057225

ABSTRACT:
Processes are disclosed which facilitate improved high-density memory circuitry, most preferably dynamic random access memory (DRAM) circuitry. An integrated circuit includes a semiconductor die, a plurality of functional and operably addressable memory cells arranged in at least one array formed on the semiconductor die, and circuitry formed on the semiconductor die and coupled to the memory cells for permitting data to be written to and read from the memory cells. The memory cells are formed with a minimum capable photolithographic feature dimension. A single memory cell consumes an area of no more than eight times the square of the minimum capable photolithographic feature dimension.

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