Semiconductor memory circuit

Static information storage and retrieval – Read/write circuit – Having fuse element

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Details

365149, 365181, G11C 1714, H01L 2710

Patent

active

050797468

ABSTRACT:
A semiconductor memory circuit comprises a plurality of memory cells and a plurality of programming transistors, each memory cell being provided at the intersections of one bit line and one word line. The memory cell includes an insulator and a cell transistor, and a conductivity type of the cell transistor selected by a word line select signal is opposite to that of the programming transistor selected by a bit line select signal. The memory cell is programmed by utilizing an electrical breakdown of the insulator, when the bit line select signal and the word line select signal supplied are in-phase and both the programming transistor and the cell transistor are switched. Therefore, the memory cell is programmed in a short time during which the programming transistor and the cell transistor are switched, and thus this semiconductor memory circuit can be programmed with a low consumption of power and of a high speed.

REFERENCES:
patent: 4782466 (1988-11-01), Yamaguchi
N. Sato et al., "A New Programmable Cell Utilizing Insulator Breakdown", Tech. Dig. of IEDM' 85, pp. 639-642.

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