Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2005-08-23
2005-08-23
Phan, Trong (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S211000, C365S226000
Reexamination Certificate
active
06934210
ABSTRACT:
The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
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Akiba Takesada
Horiguchi Masashi
Tachibana Toshikazu
Ueda Shigeki
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Hitachi Device Engineering & Co., Ltd.
Phan Trong
Reed Smith LLP
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