Semiconductor memory cell and its fabrication process

Details Semiconductor memory cell and its fabrication process Semiconductor memory cell and its fabrication process

1997-09-24

2000-07-04

Martin-Wallace, Valencia

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257133, 257134, 257256, 257272, 257287, H01L 2976, H01L 2994

Patent

active

060842741

ABSTRACT:
A semiconductor memory cell includes a read-out transistor of a first conductivity type which has source/drain regions constituted by a second conductive region and a third semiconducting region, a channel forming region constituted by a surface region of a second semiconducting region, and a conductive gate formed on a barrier layer; a switching transistor of a second conductivity type which has source/drain regions constituted by a first conductive region and the second semiconducting region, a channel forming region constituted by a surface region of a first semiconducting region, and a conductive gate formed on a barrier layer; and a current controlling junction-field-effect transistor of a first conductivity type which has gate regions constituted by a third conductive region and a portion of the second semiconducting region, a channel region constituted by a portion of the third semiconducting region, and one source/drain region extended from one end of the channel region, being constituted by a portion of the third semiconducting region, and another source/drain region extended from the other end of the channel region, being constituted by a portion of the third semiconducting region.

REFERENCES:
patent: 3934159 (1976-01-01), Nomiya et al.

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