Semiconductor memory cell and fabrication process

Details Semiconductor memory cell and fabrication process Semiconductor memory cell and fabrication process

1994-05-17

1995-10-17

Nguyen, Viet Q.

Static information storage and retrieval

Systems using particular element

Semiconductive

36518512, 257393, 257 69, 257377, 257903, H01L 2978, H01L 2701

Patent

active

054596882

ABSTRACT:
A semiconductor memory cell (10) includes first and second cross-coupled driver transistors (13, 19) each having a source-drain region and a channel region formed in a first thin-film layer (36, 36'). First and second parallel opposed wordlines (20, 22) overlie a single-crystal semiconductor substrate (12) and the channel region (46) of each driver transistor overlies a portion of an adjacent wordline. A portion of the thin-film layer (36, 36') makes contact to the single-crystal semiconductor substrate (12) adjacent to the opposite wordline. The channel and source-drain regions of first and second load transistors (15, 21) are formed in a second thin-film layer (64) which overlies the driver transistors (13, 19). The load transistors (15, 21) are cross-coupled to the driver transistors (13, 19) through common nodes (31, 33).

REFERENCES:
patent: 5285093 (1994-02-01), Lage et al.
patent: 5298782 (1994-03-01), Sundaresan
patent: 5334863 (1994-08-01), Ohkawa et al.

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