Static information storage and retrieval – Read/write circuit – Erase
Patent
1981-12-28
1984-04-10
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Erase
G11C 1140
Patent
active
044425104
ABSTRACT:
A circuit for clearing selected bytes in a semiconductor electrically alterable memory in which the ground lines for any one column of bytes is isolatable from the ground lines for other columns, all the outputs for the bytes are urged toward a non-clearing condition, and the outputs for only the selected byte are used to introduce a clearing signal that dominates the non-clearing condition.
REFERENCES:
patent: 4051464 (1977-09-01), Huang
W. S. Johnson et al., "A 16Kb Electrically Erasable Nonvolatile Memory," 1980 IEEE International Solid State Circuits Conference, pp. 152-154.
Ebel Mark S.
Priel Ury
Yaron Giora
National Semiconductor Corporation
Pollock Michael J.
Popek Joseph A.
Winters Paul J.
Woodward Gail W.
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