Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2011-05-03
2011-05-03
Tabone, Jr., John J (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C702S111000, C324S763010, C324S765010, C365S201000
Reexamination Certificate
active
07937629
ABSTRACT:
Disclosed are a semiconductor memory apparatus and a method of testing the same. The semiconductor memory apparatus includes memory banks, each of which includes a plurality of memory cells, a peripheral circuit unit that includes a plurality of circuit groups around the memory banks, and a noise generating block that is disposed in the peripheral circuit unit and selectively applies a noise to the memory banks in a test mode.
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Hynix / Semiconductor Inc.
Kaminski Jeffri A.
Tabone, Jr. John J
Venable LLP
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