Semiconductor memory apparatus having a sub-word line driver...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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Details

C365S189110

Reexamination Certificate

active

07898898

ABSTRACT:
A semiconductor memory apparatus with a sub-word line driver is presented which has an increased area margin in the memory core area. The sub-word line driver is configured to operate in response to activation of a main word line and in response to positive and negative sub-word line enable signals. The sub-word line driver includes a pull-up driver and a pull-down driver. The pull-up driver is configured to pull-up drive a first sub-word line to the potential level of the positive sub-word line enable signal in response to the activation of the main word line. The pull-down driver is configured to pull-down drive the first sub-word line in response to the negative sub-word line enable signal.

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patent: 1020070090673 (2007-09-01), None

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