Semiconductor memory apparatus for controlling pads and...

Details Semiconductor memory apparatus for controlling pads and... Semiconductor memory apparatus for controlling pads and...

2008-12-30

2011-10-25

Ngo, Ngan (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S208000, C257S209000, C257SE23020

Reexamination Certificate

active

08044395

ABSTRACT:
A semiconductor memory apparatus includes a first pad group located along a first edge of a plurality of banks, a second pad group located along a second edge of the plurality of banks opposite the first pad group, and a pad control section configured to provide first and second bonding signals and to implement control operation in response to a test mode signal and a bonding option signal to selectively employ signals from the first and second pad groups.

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