Semiconductor memory apparatus capable of detecting error in...

Details Semiconductor memory apparatus capable of detecting error in... Semiconductor memory apparatus capable of detecting error in...

2011-01-25

2011-01-25

Alphonse, Fritz (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error/fault detection technique

C714S768000, C714S807000

Reexamination Certificate

active

07877675

ABSTRACT:
A semiconductor memory apparatus capable of detecting an error in data input/output includes a memory cell block including a plurality of memory cells. A data input unit receives data from outside the semiconductor memory apparatus and performs predetermined signal processing to record the received data in the memory cell block. A first global data line is connected between the data input unit and the memory cell block. A data output unit receives data from the memory cell block and performs predetermined signal processing to output the received data to the outside of the semiconductor memory apparatus. A second global data line is connected between the memory cell block and the data output unit. A multiplexer selectively outputs data from the first or second global data line in response to a control signal. An error detection code generator generates an error detection code having a plurality of bits to detect whether the data output from the multiplexer includes an error, and outputs the error detection code to the outside of the semiconductor memory apparatus.

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