Semiconductor memory apparatus

Details Semiconductor memory apparatus Semiconductor memory apparatus

1990-10-30

1993-05-04

Clawson, Jr., Joseph E.

Static information storage and retrieval

Systems using particular element

Flip-flop

365205, 36523006, 365233, G11C 706

Patent

active

052087719

ABSTRACT:
In a semiconductor memory apparatus having a plurality of sense amplifiers each including a pair of flip-flops respectively formed of n-channel and p-channel FETs, the flip-flops being connected in parallel between a pair of data lines each coupled to receive data signals from a plurality of memory cells, the p-channel flip-flops are activated prior to the n-channel flip-flops at the start of a memory read operation, to thereby ensure that even with an adverse combination of logic states of a data word read from a very large storage capacity memory, there will be no significant difference between the respective time points at which amplification by the n-channel flip-flop and p-channel flip-flops of each sense amplifier begin.

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