Semiconductor memory and video signal processing circuit having

Details Semiconductor memory and video signal processing circuit having Semiconductor memory and video signal processing circuit having

1991-08-29

1992-09-22

Bowler, Alyssa H.

Static information storage and retrieval

Read/write circuit

36518904, 365219, 365221, 36523008, G11C 700, G11C 800

Patent

active

051503271

ABSTRACT:
A semiconductor memory includes a writing circuit for dividing data continuously supplied to a serial data input circuit into a plurality of bits, a serial data output circuit for continuously providing data read out a plurality of bits a a time by a reading circuit, a memory cell array including a column decoder and a row decoder, column and row address buffers for instructing addresses for a plurality of bits at a time to the respective column and row decoders, an address generator, and a circuit provided between the address generator and column decoder and including a read column address generator, a write column address generator and a column address control circuit for switching read and write column address generated from the read and write column address generators, wherein address identity data are simultaneously inputted and outputted through switching of internal column addresses for reading and writing.

REFERENCES:
patent: 4633441 (1986-12-01), Ishimoto
patent: 4847809 (1989-07-01), Suzuki
patent: 4870621 (1989-09-01), Nakada
patent: 4882710 (1989-11-01), Hashimoto et al.
patent: 4937788 (1990-06-01), Harada
Nikkei Electronics No. 404; Sep. 22, 1986; pp. 199-217.

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