Semiconductor memory and redundant circuit

Static information storage and retrieval – Read/write circuit – Bad bit

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Details

3652257, G11C 700

Patent

active

061341592

ABSTRACT:
A semiconductor memory includes a memory array; data buses connected to the memory array; a plurality of data transmission circuits connected to the data buses one by one; and a buffer circuit connected to an outside device. The memory further includes a gate circuit arranged between the data transmission circuits and the buffer circuit; and a fuse connected to the gate circuit. The data transmission circuits are selectively connected to the buffer circuit by controlling the fuse and the gate circuit, so that a defective element is replaced with a normal element.

REFERENCES:
patent: 5502676 (1996-03-01), Pelley, III et al.
patent: 6018488 (2000-01-01), Mishima et al.
patent: 6021075 (2000-02-01), Ueno

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