Semiconductor memory and redundant-address writing method

Details Semiconductor memory and redundant-address writing method Semiconductor memory and redundant-address writing method

1993-12-23

1996-01-16

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Bad bit

3652257, 36523006, 36523003, G11C 2900, H01L 2710

Patent

active

054854245

ABSTRACT:
The objects of the present invention are to enhance the operating speed by improving the access speed to a redundant memory, and also to enable a redundant address to be written into an electrically programmable memory device, which stores the redundant address, even for a semiconductor memory designed to operate with a low-voltage, single power supply. In a semiconductor memory according to a first aspect of the invention, an address detection circuit, which determines whether the access is for a replaced element, is constructed with a gate circuit that can be set either to such a state as to enable one of two complementary input signals for output or to a high impedance state, and a signal line, onto which a signal to inhibit the selection of normal memory cells is output upon detection of an address signal for redundancy, is directly controlled by an output of a redundancy memory circuit which stores the state of the redundancy function. Furthermore, in a semiconductor memory according to a second aspect of the invention, the write voltage for writing an address into a redundancy nonvolatile semiconductor memory is supplied from outside the semiconductor memory.

REFERENCES:
patent: 5179536 (1993-01-01), Kasa et al.
patent: 5233566 (1993-08-01), Imamiya et al.
patent: 5241510 (1993-08-01), Kobayashi et al.
patent: 5325333 (1994-06-01), Sato

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