Semiconductor memory and method of writing data into the...

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S185100

Reexamination Certificate

active

07554833

ABSTRACT:
A non-volatile semiconductor memory including a silicon substrate having first and second diffusion layers at its surface and a control gate located above a channel region defined by the first and the second diffusion layers and formed on the silicon substrate. The memory further includes first, second and third capacitors are formed on the channel region, respectively under the control gate, on one side of the control gate and the first capacitor and at the opposite side of the control gate and first capacitor.

REFERENCES:
patent: 6841821 (2005-01-01), Hsu
patent: 7042052 (2006-05-01), Bhattacharyya
patent: 2002-184873 (2002-06-01), None
patent: 2005-064295 (2005-03-01), None
patent: 2005-116667 (2005-04-01), None
patent: WO 01/17018 (2001-03-01), None
“4-bit per Cell NROM Reliability”, B. Eitan et al., IEEE International Devices Meeting 2005, IEDM Technical Digest, pp. 539-542.

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