Semiconductor memory and method for entering its operation mode

Static information storage and retrieval – Read/write circuit – Including signal comparison

Reexamination Certificate

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C365S189050, C365S189120, C365S230060, C365S230080

Reexamination Certificate

active

06925016

ABSTRACT:
There is provided a method of entry of an operation mode of a semiconductor memory during operations without need of any specific timing specification and with effective suppression to any erroneous entry. If read cycles for plural addresses are continued, then, a request for entry of operation mode is accepted. In write cycles following to those read cycles, an operation mode to be entered is decided based on data externally designated, wherein in the first write cycle, the kind of the operation mode is set, and then in the next write cycle, conditions for the operation mode are set for the entry of the operation mode of the semiconductor memory.

REFERENCES:
patent: 5506726 (1996-04-01), Tahira
patent: 5521873 (1996-05-01), Ohsawa
patent: 5778440 (1998-07-01), Yiu et al.
patent: 6246614 (2001-06-01), Ooishi
patent: 62-180398 (1987-11-01), None

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