Semiconductor memory

Static information storage and retrieval – Read/write circuit – For complementary information

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365205, G11C 706

Patent

active

044096747

ABSTRACT:
In a semiconductor memory which is provided with a memory cell array, word lines and bit lines for selecting a desired one of memory cells of the memory cell array and a detector circuit for detecting a read current of the selected memory cell, the detector circuit is composed of a pair of transistors having their bases cross-connected so that a hysteresis characteristic is provided by flowing a current in the transistors, and the current is controlled by a hysteresis control circuit to flow only when all word line potentials monitored by the hysteresis control circuit have become lower than a predetermined value, whereby to remove the influence of a noise in the detection of read information of the selected memory cell.

REFERENCES:
patent: 4297598 (1981-10-01), Smith
Dennison et al., Harper Cell Read Reference Circuit, IBM Tech. Disc. Bul., vol. 18, No. 9, 2/76, pp. 2902-2904.

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