Static information storage and retrieval – Read/write circuit – Differential sensing
Patent
1998-01-30
1999-03-30
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Differential sensing
365208, 36518905, 36518908, 36523006, G11C 702, G11C 700, G11C 800
Patent
active
058897160
ABSTRACT:
In a semiconductor memory storing multivalue information, a sense section includes a first latch receiving an output of a first differential amplifier in a sense amplifier, a second latch receiving an output of a second differential amplifier in the sense amplifier and an output of the first latch, and a third latch receiving an output of a third differential amplifier in the sense amplifier and an output of the second latch. When a selected memory cell has the lowest threshold, the output of the first latch becomes a low level, and correspondingly, the output of the second latch is forcibly brought to the low level in response to the low level of the output of the first latch, and then, the output of the third latch is forcibly brought to the low level in response to the low level of the output of the second latch. Therefore, even if the output of the second and third differential amplifiers varies because of power supply voltage noises, the data can be correctly read out without being influenced by the power supply voltage noises.
REFERENCES:
patent: 4751681 (1988-06-01), Hashimoto
patent: 5179539 (1993-01-01), Horiguchi et al.
patent: 5463588 (1995-10-01), Chonan
NEC Corporation
Nelms David C.
Phan Trong
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