Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1986-03-06
1988-03-29
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Bad bit
365203, 365210, G11C 1300, G11C 1140
Patent
active
047348895
ABSTRACT:
A spare Y decoder is provided with MOS transistors 14 and 20 for charge on both sides of a parasitic resistor 19. As a result, nodes N1 and N2 are rapidly charged by the MOS transistors 20 and 14 for charge, respectively.
REFERENCES:
patent: 4586170 (1986-04-01), O'Toole et al.
patent: 4592027 (1986-05-01), Masaki
patent: 4601017 (1986-07-01), Mochizuki et al.
"THPM 12.6: A Fault-Tolerant 64K Dynamic RAM", Ronald P. Cenker et al; IEEE, Digest of Technical Papers, 1979, ISSCC, pp. 150-151 & 290.
Ikeda Yuto
Mashiko Koichiro
Morooka Yoshikazu
Yamagata Tadato
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
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