Semiconductor memory

Details Semiconductor memory Semiconductor memory

1999-03-22

2000-09-19

Phan, Trong

Static information storage and retrieval

Read/write circuit

Data refresh

G11C 700

Patent

active

061222143

ABSTRACT:
In addition to a pulse train of a refresh request (RRQ) signal requesting for refresh per memory row, a self-refresh mode (SRMOD) signal is applied to a refresh control circuit. As soon as the SRMOD signal makes a transition from LOW to HIGH, an oscillation circuit starts generating a clock pulse train. In response to this clock pulse train, a set pulse is generated. A flip-flop circuit is set by the set pulse and a leading edge of a periodic refresh request (PRRQ) signal pulse is generated. Every time the PRRQ signal becomes HIGH, a reset pulse is generated, the flip-flop circuit is reset by the reset pulse, and a trailing edge of the PRRQ signal pulse is generated. Such arrangement provides a memory having a novel refresh input specification capable of reducing a burden of logic circuits for controlling access of the memory.

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patent: 5818777 (1998-10-01), Seyyedy
patent: 6002629 (1999-12-01), Kim et al.

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