Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1989-04-18
1991-06-25
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Data refresh
G11C 11406
Patent
active
050273272
ABSTRACT:
A semiconductor memory having dynamic memory cells includes a determining circuit for determining whether or not it is necessary to refresh the dynamic memory cells, and only when it is necessary, outputting a refresh execution signal in response to a refresh request signal from an external circuit, and a circuit for executing a refresh operation in response to the refresh execution signal. Even if the refresh request signal is supplied, a refresh operation is not executed unless the determining circuit determines that the refresh operation is necessary, thus dispensing with unnecessary refresh operations. Preferably, the determining circuit includes a timer which outputs a signal at every predetermined period. Only when the signal is output from the timer, is the refresh request signal from an external circuit accepted and the refresh execution signal output.
REFERENCES:
patent: 4625301 (1986-11-01), Berger
patent: 4672583 (1987-06-01), Nakaizumi
Toshi Corporation, "MOS Memory Products" Data Book, Jan. 1988, pp. 307-317.
Inatsuki Tatsuya
Isobe Mitsuo
Kobayashi Makiji
Ueno Hisashi
Kabushiki Kaisha Toshiba
Popek Joseph A.
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