Static information storage and retrieval – Read/write circuit – Including signal comparison
Patent
1987-12-09
1989-06-20
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Including signal comparison
365182, 365202, G11C 1300
Patent
active
048414832
ABSTRACT:
The invention provides a semiconductor memory having a plurality of memory cells and a bit line connected to the memory cells comprising, the bit line being formed of a plurality of sub-bit lines, switch means for interconnecting and disconnecting the sub-bit lines, reference potential means for storing reference potentials, and sense amplifier means for comparing the output of an addressed memory cell with the reference potentials, whereby the memory is capable of storing n-valued data using n different storage potentials.
REFERENCES:
Aoki et al., "A 16-Levels/Cell Dynamic Memory," IEEE International Solid-State Circuits Conference, ISSCC Digest of Technical Papers, pp. 246-247, Feb. 15, 1985.
Fears Terrell W.
Kabushiki Kaisha Toshiba
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