Semiconductor memory

Details Semiconductor memory Semiconductor memory

2007-02-09

2008-11-25

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Magnetoresistive

C365S063000, C365S148000

Reexamination Certificate

active

07457150

ABSTRACT:
The first memory cell in even columns is composed of a first resistance change element one end of which is connected to a first bit line, and first and second FETs connected in parallel between the other end of the first resistance change element and a second bit line. The second memory cell in odd columns is composed of a second resistance change element one end of which is connected to a third bit line, and third and fourth FETs connected in parallel between the other end of the second resistance change element and a fourth bit line. A gate of the first FET is connected to the first word line. Gates of the second and third FETs are connected together to the second word line. A gate of the fourth FET is connected to the third word line.

REFERENCES:
patent: 5695864 (1997-12-01), Slonczewski
patent: 2007/0171706 (2007-07-01), Fuji
patent: 2003-17665 (2003-01-01), None
patent: 2004-103657 (2004-04-01), None
patent: 2004-348934 (2004-12-01), None
patent: 2005-71500 (2005-03-01), None
J. DeBrosse, et al., “A 16Mb MRAM Featuring Bootstrapped Write Drivers”, 2004 Symposium on VLSI Circuits Digest of Technical Papers, IEEE, 2004, pp. 454-457.

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