Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate
2006-11-21
2008-09-09
Phung, Anh (Department: 2824)
Static information storage and retrieval
Addressing
Multiple port access
C365S189040
Reexamination Certificate
active
07423926
ABSTRACT:
A semiconductor memory includes memory cells for even addresses arranged in a first memory array and storing even addressed data, word lines for even addresses arranged parallel to a row direction of the first memory array and selecting the memory cells for even addresses, bit lines for even addresses arranged parallel to a column direction of the first memory array and transferring the even addressed data to the memory cells for even addresses, memory cells for odd addresses arranged in a second memory array and storing odd addressed data, word lines for odd addresses arranged parallel to a row direction of the second memory array and selecting the memory cells for odd addresses, and bit lines for odd addresses arranged parallel to a column direction of the second memory array and transferring the odd addressed data to the memory cells for odd addresses.
REFERENCES:
patent: 5923593 (1999-07-01), Hsu et al.
patent: 6515887 (2003-02-01), Fujimoto
patent: 6885608 (2005-04-01), Nagano
patent: 2003-132684 (2003-05-01), None
Fujimoto Yukihiro
Imai Seiro
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Phung Anh
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