Semiconductor memory

Details Semiconductor memory Semiconductor memory

2005-04-01

2008-05-13

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Systems using particular element

Amorphous

C365S158000

Reexamination Certificate

active

07372726

ABSTRACT:
A phase-change memory for employing chalcogenide as a recording medium is disclosed, which prevents the read disturbance from being generated, and reads data at high speed. In a phase-change memory cell array including a selection transistor and chalcogenide, a substrate potential of the selection transistor is isolated in a direction perpendicular to the word lines. During the data recording, a forward current signal flows between the substrate and the source line connected to chalcogenide, and the selection transistor is not used. During the data reading, a desired cell is selected by the selection transistor. Therefore, a recording voltage is greatly higher than the reading voltage, such that the occurrence of read disturbance is prevented, and a high-speed operation is implemented.

REFERENCES:
patent: 6930912 (2005-08-01), Inui
patent: 7236388 (2007-06-01), Hosoi et al.
patent: 2005/0119418 (2005-06-01), Matsumoto et al.
patent: 2006/0081941 (2006-04-01), Iwata et al.
patent: 2006/0081961 (2006-04-01), Tanaka et al.

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