Semiconductor memory

Details Semiconductor memory Semiconductor memory

2006-10-26

2008-03-25

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S203000, C365S149000

Reexamination Certificate

active

07349275

ABSTRACT:
A system in which an overdrive period in a DRAM may be provided without providing for accurate delay time. There are provided MOS transistor TP1, capacitor C1, MOS transistor TP2, and control circuit. MOS transistor TP1is turned on when overdriving begins, and is designed to supply voltage of power supply VDD1to parallel-connected sense amplifiers. Capacitor C1accumulates electrical charges referenced to in association with electrical charges supplied to sense the amplifiers via MOS transistor TP1. MOS transistor TP2is turned on when overdriving begins, to supply voltage of power supply VDD1to capacitor C1. The control circuit controls so that MOS transistors TP1, TP2are turned off when the capacitor potential has reached voltage VREF1. There is also provided a MOS transistor turned on after the MOS transistors TP1, TP2are turned off to supply a power supply voltage equal to the voltage VREF1to the plural sense amplifiers.

REFERENCES:
patent: 5703819 (1997-12-01), Gotoh
patent: 6392944 (2002-05-01), Kono
patent: 6519198 (2003-02-01), Suematsu et al.
patent: 6754122 (2004-06-01), Wada et al.
patent: 6762968 (2004-07-01), Suematsu et al.
patent: 2002-230975 (2002-08-01), None

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