Semiconductor memory

Details Semiconductor memory Semiconductor memory

2007-06-05

2007-06-05

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S189070

Reexamination Certificate

active

11073036

ABSTRACT:
A bit line is connected to a charge storing circuit through a charge transferring circuit. A control circuit controls charge transferability of the charge transferring circuit according to a change in the voltage of the bit line resulting from a charge read out from a memory cell. A leakage controlling circuit lowers the charge transferability of the charge transferring circuit in a read operation temporarily before the charge is read out to the bit line. The leakage controlling circuit makes it possible to avoid charge transfer between the charge storing circuit and the bit line before data is read from the memory cell. The charge storing circuit can thus generate a read voltage sufficient for a read circuit to operate with, in accordance with the logical value of the data stored in the memory cell.

REFERENCES:
patent: 6487103 (2002-11-01), Yamamoto et al.
patent: 6809951 (2004-10-01), Yamaguchi
patent: 2002-133857 (2002-05-01), None
“Bitline GND Sensing Technique for Low-Voltage Operation FeRAM”, Kawashima et al,IEEE Journal of Solid-State Circuits, vol. 37, No. 5, May 2002, pp. 592-598.

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