Semiconductor memory

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit

Reexamination Certificate

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C365S189070, C365S230060

Reexamination Certificate

active

11202230

ABSTRACT:
Provided is a semiconductor memory, comprising: a voltage converting circuit which voltage-converts a resistance difference between a first and a second resistance elements; a voltage comparing circuit which outputs an output corresponding to the voltage conversion; a latch circuit for holding the output of the voltage comparing circuit; and a switch circuit which cuts and connects the voltage converting circuit and the voltage comparing circuit.

REFERENCES:
patent: 5610859 (1997-03-01), Nakamura et al.
patent: 5761122 (1998-06-01), Nakamura et al.
patent: 6297624 (2001-10-01), Mitsui et al.
patent: 6384664 (2002-05-01), Hellums et al.
Alavi, et al., “A PROM Element Based on Salicide Agglomeration of Poly Fuses in a CMOS Logic Process,” IEEE, 1997.

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