Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2006-09-26
2006-09-26
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S191000, C365S189040, C365S201000
Reexamination Certificate
active
07113441
ABSTRACT:
A refresh signal is output in response to a refresh request generated at predetermined cycles, and a refresh operation is performed. The refresh operation ends when a conflict occurs between an access request and the refresh request. Consequently, an access operation corresponding to the access request can be started earlier with a reduction in access time. The access time can be reduced further by changing the end time of the refresh operation in accordance with the timing of supply of the access request. Since a test circuit for notifying the state of the refresh operation to exterior is formed, the operation margin of the refresh operation can be evaluated in a short time. As a result, it is possible to reduce the development period of the semiconductor memory.
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English Translation of JP 49-46346A (Sep. 6, 1972).
Funyu Akihiro
Kanda Tatsuya
Sato Takahiko
Shinozaki Naoharu
Arent & Fox PLLC
Elms Richard
Fujitsu Limited
Luu Pho M.
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