Semiconductor memory

Static information storage and retrieval – Systems using particular element – Semiconductive

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Details

36518901, 365204, G11C 11407, G11C 700, G11C 706

Patent

active

052726681

ABSTRACT:
A semiconductor memory circuit comprises a plurality of memory cells each connected to a corresponding word line and a corresponding pair of digit lines connected connected to a sense amplifier. Each pair of digit lines are connected to one pair of read bus lines, which are respectively connected to emitters of a pair of transistors forming a current-voltage converter. The semiconductor memory circuit also includes one buffer which comprises a first bipolar transistor having an emitter connected to one of the pair of read bus lines, and a second bipolar transistor having an emitter connected to the other of the pair of read bus lines. Bases of the first and second bipolar transistors are connected to each other, and emitters of the first and second bipolar transistors are connected to different current sources, respectively. Collectors of the first and second bipolar transistors are connected being respectively connected to the emitters of the pair of transistors of the current-voltage converter.

REFERENCES:
patent: 4829479 (1989-05-01), Mitsumoto et al.
patent: 5111435 (1992-05-01), Miyamoto

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